CONFIG_ARM64_ERRATUM_2054223 is not available for thedefaultarchitecture x86.
Result is shown for architecture arm64
Cortex-A710: 2054223: workaround TSB instruction failing to flush trace
configname: CONFIG_ARM64_ERRATUM_2054223
Linux Kernel Configuration
└─>Kernel Features
└─>ARM errata workarounds via the alternatives framework
└─>Cortex-A710: 2054223: workaround TSB instruction failing to flush trace
In linux kernel since version 5.2 (release Date: 2019-07-07)
Enable workaround for ARM Cortex-A710 erratum 2054223
Affected cores may fail to flush the trace data on a TSB instruction, when
the PE is in trace prohibited state. This will cause losing a few bytes
of the trace cached.
Workaround is to issue two TSB consecutively on affected cores.
If unsure, say Y.
Affected cores may fail to flush the trace data on a TSB instruction, when
the PE is in trace prohibited state. This will cause losing a few bytes
of the trace cached.
Workaround is to issue two TSB consecutively on affected cores.
If unsure, say Y.