stable - 6.5.5
mainline - 4.19.295
mainline - 5.10.197
mainline - 5.15.133
mainline - 5.4.257
mainline - 4.14.326
mainline - 6.4.16
mainline - 6.1.55
mainline - 6.6-rc2
[click here for custom version]
CONFIG_ARM64_ERRATUM_2064142 is not available for the default architecture x86.
Result is shown for architecture arm64
Cortex-A510: 2064142: workaround TRBE register writes while disabled
Linux Kernel Configuration
└─> Kernel Features
└─> ARM errata workarounds via the alternatives framework
└─> Cortex-A510: 2064142: workaround TRBE register writes while disabled
This option adds the workaround for ARM Cortex-A510 erratum 2064142.
Affected Cortex-A510 core might fail to write into system registers after the
TRBE has been disabled. Under some conditions after the TRBE has been disabled
writes into TRBE registers TRBLIMITR_EL1, TRBPTR_EL1, TRBBASER_EL1, TRBSR_EL1,
and TRBTRG_EL1 will be ignored and will not be effected.
Work around this in the driver by executing TSB CSYNC and DSB after collection
is stopped and before performing a system register write to one of the affected
If unsure, say Y.
kernelconfig.io - © copyright 2022 -