stable - 5.18.6
mainline - 5.4.200
mainline - 4.14.284
mainline - 5.15.49
mainline - 5.17.15
mainline - 5.10.124
mainline - 4.9.319
mainline - 4.19.248
mainline - 5.19-rc3
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CONFIG_ARM64_ERRATUM_2064142 is not available for the default architecture x86.
Result is shown for architecture arm64
Cortex-A510: 2064142: workaround TRBE register writes while disabled
Linux Kernel Configuration
└─> Kernel Features
└─> ARM errata workarounds via the alternatives framework
└─> Cortex-A510: 2064142: workaround TRBE register writes while disabled
This option adds the workaround for ARM Cortex-A510 erratum 2064142.
Affected Cortex-A510 core might fail to write into system registers after the
TRBE has been disabled. Under some conditions after the TRBE has been disabled
writes into TRBE registers TRBLIMITR_EL1, TRBPTR_EL1, TRBBASER_EL1, TRBSR_EL1,
and TRBTRG_EL1 will be ignored and will not be effected.
Work around this in the driver by executing TSB CSYNC and DSB after collection
is stopped and before performing a system register write to one of the affected
If unsure, say Y.
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