Cortex-A510: Completion of affected memory accesses might not be guaranteed by completion of a TLBI
configname: CONFIG_ARM64_ERRATUM_2441009
Linux Kernel Configuration
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Kernel Features
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ARM errata workarounds via the alternatives framework
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Cortex-A510: Completion of affected memory accesses might not be guaranteed by completion of a TLBI
This option adds a workaround for ARM Cortex-A510 erratum #2441009.
Under very rare circumstances, affected Cortex-A510 CPUs
may not handle a race between a break-before-make sequence on one
CPU, and another CPU accessing the same page. This could allow a
store to a page that has been unmapped.
Work around this by adding the affected CPUs to the list that needs
TLB sequences to be done twice.
Under very rare circumstances, affected Cortex-A510 CPUs
may not handle a race between a break-before-make sequence on one
CPU, and another CPU accessing the same page. This could allow a
store to a page that has been unmapped.
Work around this by adding the affected CPUs to the list that needs
TLB sequences to be done twice.
If unsure, say Y.