Sophgo SG2042 PLL clock support
modulename: clk-sg2042-pll.ko
configname: CONFIG_CLK_SOPHGO_SG2042_PLL
Linux Kernel Configuration
└─>Device Drivers
└─>Common Clock Framework
└─>Sophgo SG2042 PLL clock support
In linux kernel since version 6.11 (release Date: 2024-09-15)
This driver supports the PLL clock controller on the
Sophgo SG2042 SoC. This clock IP uses three oscillators with
frequency of 25 MHz as input, which are used for Main/Fixed
PLL, DDR PLL 0 and DDR PLL 1 respectively.
Sophgo SG2042 SoC. This clock IP uses three oscillators with
frequency of 25 MHz as input, which are used for Main/Fixed
PLL, DDR PLL 0 and DDR PLL 1 respectively.