CONFIG_MIPS_MT_SMTC_IM_BACKSTOP is not available for thedefaultarchitecture x86.
Result is shown for architecture mips
default or selected kernelversion does not have config value CONFIG_MIPS_MT_SMTC_IM_BACKSTOP.
Result is shown for kernelversion 6.5.1
Use per-TC register bits as backstop for inhibited IM bits
configname: CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
Linux Kernel Configuration
└─>Kernel type
└─>Use per-TC register bits as backstop for inhibited IM bits
In linux kernel since version 2.6.23 (release Date: 2007-10-09)
To support multiple TC microthreads acting as "CPUs" within
a VPE, VPE-wide interrupt mask bits must be specially manipulated
during interrupt handling. To support legacy drivers and interrupt
controller management code, SMTC has a "backstop" to track and
if necessary restore the interrupt mask. This has some performance
impact on interrupt service overhead.
a VPE, VPE-wide interrupt mask bits must be specially manipulated
during interrupt handling. To support legacy drivers and interrupt
controller management code, SMTC has a "backstop" to track and
if necessary restore the interrupt mask. This has some performance
impact on interrupt service overhead.